The present invention generally relates to electron beam exposure systems used for writing a pattern on semiconductor wafers, and particularly to an electron beam exposure system having an improved operational efficiency.
The electron beam exposure system is an essential facility for fabricating high speed, high integration density semiconductor devices that require a sub-micron patterning. By irradiating a finely focused electron beam, one can easily write a pattern on a semiconductor wafer with the line thickness less than 0.3 .mu.m.
On the other hand, the electron beam exposure systems generally have a problem of relatively low throughput because of the fundamental constraint of the electron beam exposure system that the pattern has to be written by "one stroke" of electron beam. In order to overcome the problem of low throughput, various efforts are made particularly about the optical system of the electron beam exposure system.
FIG. 1 shows the construction of a conventional electron beam exposure system 100 proposed in the Japanese patent application 63-275336 corresponding to the U.S. patent application 429,500, the European patent application No. 89311047.8 and the Korean patent application No. 89-15615, which are incorporated herein as reference.
Referring to FIG. 1, the system comprises an electron gun 10 for producing an electron beam B, and the electron beam B thus produced is passed through a shaping aperture 12 after adjustment by an electron beam adjusting system 11. The electron beam B is then passed successively through first through fourth electron lenses 14, 16, 20 and 22 and finally focused on a wafer 26 supported on a movable stage 28, by an objective lens system 24. The objective lens system includes an electromagnetic main deflector 24a and an electrostatic sub-deflector for deflecting the electron beam B on the wafer 26 so that the electron beam B is moved over the surface of the wafer 26 to a desired position.
In order to facilitate the process of exposure and increase the throughput, the electron exposure system has an aperture plate or mask 34 within the electron lens 16. This mask 34 is provided with a number of patterned apertures 34A (FIG. 2) arranged for example in the row and column formation and shapes the electron beam passing therethrough By selecting a particular aperture, the electron beam B given with the shape corresponding to the selected aperture hits the wafer 26 at the designated position. Thereby, a complex semiconductor pattern can be written on the wafer 26 by successively exposing various patterns.
FIG. 2 is a diagram showing the area on the mask 34 that is covered by the electrostatic deflector 30 and the electromagnetic deflector 32, wherein the region designated as 30A represents the area that can be covered by the electrostatic deflector 30 while the region designated as 32A represents the area that can be covered by the electromagnetic deflector 32. The area 32A may have a maximum size of 50 .mu.m.times.50 .mu.m and the electron beam is deflected with the minimum pitch of 0.005 .mu.m. On the other hand, the area 30A may have a maximum size of 5 mm.times.5 mm and the electron beam is deflected with the minimum pitch of 1 .mu.m.
In order to address the desired aperture 34A on the mask 34, there is provided an electrostatic deflector 30 and an electromagnetic deflector 32 near the optical axis of the electron beam B, wherein the electrostatic deflector 30 has a very fast response and used for deflecting the electron beam B in a relatively limited area of the mask 34. On the other hand, the electromagnetic deflector 32 provides a large deflection angle, though with reduced response, and used for addressing the apertures in the wide area of the mask 34. Only when the deflection by the deflector 30 and the deflection by the deflector 32 are determined, the addressing of the aperture is completed. During the exposure, it should be noted that the stage 28 may be moved in the plane perpendicular to the optical axis as shown by the arrows in FIG. 1.
FIG. 3 shows the construction of a conventionally used control system for driving the electrostatic deflector 30 and the electromagnetic deflector 32.
Referring to FIG. 2, the system comprises a CPU 101 that operates according to the program stored in a magnetic tape device 102. The CPU 101 reads out the exposure data representing the semiconductor pattern to be written on the wafer 26 from the magnetic tape device 102 and sends the same, via a bus 103, to a data manager 104. The data manager 104 extracts, from the exposure data read out from the magnetic tape device 102, the control data for driving the electromagnetic deflector 32 called hereinafter as a main deflector and the control data for driving the electrostatic deflector 30 called hereinafter a sub-deflector. The control data for the main deflector 32 is transferred to a main deflector memory 106 along a line l.sub.1 while the control data for the sub-deflector 30 is transferred from the data manager 100 to a band memory 105 via a line l.sub.2 and from the band memory 105 to a sub-deflector memory 107 along a line l.sub.3. The band memory 105 is used for extracting the speed of movement of the stage 28 from the exposure data.
Further, there is provided a pattern generation and compensation unit 109 that is supplied with the control data of the main deflector memory 106 and the sub-deflector memory 107 for producing digital deflection control signals for the main and sub-deflectors. These deflection control signals for the main and sub-deflectors 32 and 30 are converted into corresponding analog signals by a D/A converter 110 and a D/A converter 111, respectively, and supplied to the deflectors 30 and 32 via respective main amplifiers 112 and 113. Further, in order to control the exposure sequence, a sequence controller 108 is provided for controlling the data compensation unit 109.
In the exposure sequence, the sequence controller 108 issues a command to the data manager 104 and the pattern generation and compensation unit 109, and in response to this, the data manager 104 reads the deflection data stored in the main deflector memory 106 via the line l.sub.1 and transfers the same to the pattern generation and compensation unit 109. The unit 109 further reads out the deflection control data stored in the sub-deflector memory 107 in response to the content of the control data read from the main deflection memory 106.
The pattern generation and compensation unit 109 then outputs the digital deflection control signals corresponding to the control data read out from the memories 106 and 107 to the D/A converters 110 and 111 for D/A conversion, and the analog deflection control signals thus obtained are supplied to the main and sub-deflectors 32 and 30 via the main amplifiers 112 and 113, respectively. Thereby, the desired addressing of the aperture in the mask 34 is achieved.
FIG. 4 shows the relationship between the content of the deflection control data stored in the main deflector memory 106 and content in the sub-deflector memory 107. Referring to FIG. 4, the memory 106 stores, in each address, the beam deflection data X and Y such as (0, 0), (100, 100), . . . , respectively representing the X- and Y-coordinates of the electron beam on the mask 34 set by the electromagnetic deflector 32 (See FIG. 2). Further, in correspondence to each set of the beam deflection data X and Y, address data ADR representing the initial address of the sub-deflector memory 107 to be referred to at first and the number of OPC codes to be referred to subsequently to the initial address ADR, are stored. The OPC code represents the code representing the pattern that is addressed on the mask 34. For example, the set (0, 0) at the first address of the main deflector memory 106 for the value of X and Y has the value of ADR of zero and the number of OPC codes of 3. When this content is obtained, as a result of the reading of the main deflection memory 106, the pattern generation and pattern compensation unit 109 specifies the address 0 of the sub-deflector memory 107 and reads the content of three consecutive addresses starting from the address 0.
The sub-deflector memory 106 stores, in each address, the data X.sub.0 and Y.sub.0 that represent the initial point of the beam to be set by the sub-deflector 30 and the data X.sub.1 and Y.sub.1 representing the deflection of the electron beam achieved by the sub-deflector 30. FIG. 5 shows the geometrical relationship between the data (X.sub.0, Y.sub.0) and the data (X.sub.1, Y.sub.1) The data (X.sub.0, Y.sub.0) generally coincides with the data (X,Y) representing the deflection of the electron beam by the main deflector 32. In each set of the parameters X.sub.0, Y.sub.0, X.sub.1 and Y.sub.1, the position of the electron beam on the mask 34 is determined and the cross section of the electron beam assumes a pattern corresponding to the selected set. Thus, in the foregoing case of X=0, Y=0, the cross section of the electron beam assumes the three consecutive patterns starting from the address 0 of the sub-deflector memory 107. Similarly, when X=100 and Y=100 in the main deflector memory 106, the cross section of the electron beam assumes consecutively the three patterns starting from the address 3 (ADR=3) of the sub-deflector memory 107.
In such a conventional electron beam exposure system, there exists a problem in that the reading of the deflection control data from the main and sub-deflector memories 106 and 107 cannot be started until the entire exposure data is stored in the memories 106 and 107. It should be noted that the storage of the deflection control data in the main deflector memory 106 is made from the data manager 104 to the memory 106 via the line l.sub.1 while the same line l.sub.1 is used for reading the deflection control data. Thus, as long as the line l.sub.1 is used for storing the data, the reading of the data from the memory cannot be started.
Further, as can be seen from the logical relationship between the deflection control data stored in the memory 106 and the data stored in the memory 107, the reading of the content of the memory 107 cannot be started until the reading of the deflection control from the memory 106 is completed. Unless the deflection control data for the main and sub-deflectors 32 and 30 are determined, the exposure of the wafer 26 by the electron beam B cannot be started. In other words, the exposure system 100 has to wait for the complete transfer of the exposure data from the magnetic tape device 102 to the memories 106 and 107. Such a process may last as much as several ten minutes for each wafer and the conventional system of FIG. 3 has an inherent problem of low throughput, in addition to the low throughput originating from the "one-stroke" exposure process pertinent to the electron beam exposure systems. Further, in addition to the foregoing low throughput, the system of FIG. 3 has a problem of complex transmission path of data along various lines such as the lines l.sub.1, l.sub.2 and l.sub.3, and associated therewith, there tends to occur undesirable cross-talk or reflection of signals at the time of transferring the data. Such a problem becomes particularly conspicuous when the operational margin for the transmission of data is reduced for maximizing the operational speed of the system.